A Microcontroller-Based Precision ECG Signal Generator

A Microcontroller-Based Precision ECG Signal Generator M. J. BURKE M. NASOR Dept. of Electronic and Electrical Engineering, Trinity College, Dublin 2, REPUBLIC OF IRELAND.

Abstract: - This article reports the design and development of an ECG simulator intended for use in the testing calibration and maintenance of electrocardiographic equipment. It generates a lead II signal having a profile that varies with heart rate in a manner which reflects the true in-vivo variation. Facilities are provided for user adjustment of heart rate, signal amplitude, QRS complex up-slope, and the relative amplitudes of the P-wave and T-wave. The heart rate can be set within the range 30-200 beats/minute in steps of 1 beat/minute. The amplitude of the QRS complex can be adjusted from 0.1-20mV in 0.1mV steps, while its up-slope can be set between 10 and 50ms with a 1ms resolution. The amplitude of the P-wave can be varied from 5-40% and that of the T-wave from 10-80% of the amplitude of the QRS complex with a 1% resolution. Key Words: - Electrocardiogram, ECG, Signal generation, ECG synthesis, ECG simulation. P-Q Interval

1. Introduction Since its original recording by Einthoven [1], the electrocardiogram (ECG) has become one of the most valuable diagnostic tools in modern medicine. The diagnosis and treatment of many cardiovascular diseases relies heavily upon a visual inspection of the recorded ECG signal. Consequently, it is of the utmost importance that the profile of the ECG waveform be as faithfully preserved as possible in its passage through the recording equipment [2-4]. When testing, evaluating, faultfinding and calibrating such equipment, it is essential to have a test ECG signal which is a realistic representation of the in-vivo electrocardiogram. Many signal sources acting as patient simulators electronically synthesize a signal representing the ECG. Very often, the profiles of such signals do not vary over the full range of heart rate in a manner that reflects their true behaviour in practice [5]. Other sources rely on the reproduction of stored, previously recorded signals [6,7]. While these signals are very useful for replicating certain clinical conditions such as arrhythmia, they do not provide stationary conditions for calibration purposes. In addition, it is rarely possible to vary the characteristics of individual components in the signal, such as the QRS-complex or the P and T waves, in a selective fashion. This article reports the development of a relatively inexpensive programmable ECG signal simulator which provides these facilities.

P-Wave Duration

P-Q Segment

Q-T Interval

QRS Duration

S-T Segment

T-Wave Duration

Fig. 1 A typical ECG signal profile with timing of components defined

2. Background The principal constituent components of the electrocardiogram are defined in Fig. 1. It is well recognized that the durations of individual components vary with heart rate in a non-linear manner. However, most attention in exploring these relationships has been confined to the Q-T interval because of its clinical importance [8-13] and little effort has been made to investigate the timing of other components in the ECG. In recent work on this topic [14] the authors used a wavelet transform method to precisely determine the positions of the onset, peak, termination and consequently the duration of individual components in the ECGs of several subjects. Component times were then

classified according to the heart rate corresponding to the cardiac cycle to which the component belonged. Second order equations in the square root of the cardiac cycle time, TR-R of the form A.√TR-R + B.TR-R + C were fitted to the data obtained for each component to characterize its timing variation. The set of equations obtained were as follows: TP −Wave = 0.37 TR − R − 0.22TR − R − 0.06 s (1)

TP −Q Seg

= 0.33 TR − R − 0.18TR − R − 0.08

s

( 2)

TP −Q Int

= 0.69 TR − R − 0.39TR − R − 0.14

s

(3)

TQRS

= 0.25 TR − R − 0.16TR − R − 0.02 s

(4)

TQ −T Int

= 1.21 TR − R − 0.53TR − R − 0.31

s

(5)

TT −Wave

= 1.06 TR − R − 0.51TR − R − 0.33

s

(6)

TS −T Seg = −0.09 TR − R + 0.13TR − R + 0.04

s

(7 )

These equations were used as the basis for generating an ECG signal profile that alters with heart rate to provide a realistic simulation of the true in-vivo variation.

3. Features A block diagram of the ECG simulator is shown in Fig.2. The unit is built around the 80C31 microcontroller (Intel Inc.). The operating programme is contained in an 8 kbyte erasable programmable read-only-memory (EPROM) connected to the microcontroller. The controller PROGRAMME MEMORY

ALPHANUMERIC DISPLAY UNIT

PERIPHERAL MICROCONTROLLER

INTERFACE ADAPTER

OUTPUT CONVERSION UNIT

INPUT BUTTON KEYPAD

Fig. 2 A block diagram of the ECG simulator interfaces, via a peripheral interface adapter chip for port expansion, with a keypad and a liquid crystal

display (LCD) module. The 16-button keypad allows input of user defined parameters, while the LCD alphanumeric display indicates current parameter settings. The output ECG signal is generated via a multi-level digital-to-analogue conversion unit. The simulator provides a standard lead II output signal having the following parameters which are user adjustable: Heart Rate Range: 30 - 200 beats/min. QRS Complex Amplitude: 0.1-20mV, 0.1mV steps QRS Complex Up-slope: 10 - 50 ms, 1 ms steps P-Wave Amplitude: 5 - 40 % of QRS, 1% steps T-Wave Amplitude:10 - 80 % of QRS, 1 % steps. The ECG signal is synthesised in a piecewise fashion. The QRS complex is generated as a series of linear ramps with the S-wave having a fixed amplitude of 25% of that of the R-wave. The P-wave and T-wave are generated from stored data files defining the morphology of these components of the signal. Intermediate isoelectric periods between individual waves are maintained as baseline levels. When operating, the simulator examines the user defined parameters and based on the heart rate specified, calculates the duration of each of the components of the cardiac cycle using equations 1-7 above. The entire ECG signal is then generated with the appropriate amplitude scaling applied to each of the components.

4. Circuit implementation A schematic diagram of the ECG simulator is shown in Fig. 3. The 80C31 microcontroller used, IC1, is a member of the Intel 8051 family operating from a 12MHz crystal connected with capacitors C1 and C2. This microcontroller has an efficient 8-bit CPU, 256 bytes of internal RAM, two 16-bit timers, 4 external 8-bit ports and a range of internal and external interrupt lines as well as the customary general purpose and control registers. Its instruction set includes 8-bit multiplication and division operations, which are extremely useful for the calculations required in determining the timing of the ECG components. The operating programme is stored in the 8 kbyte EPROM, IC2, which is connected to the microcontroller via the 8-bit address latch, IC3. The lower 8 lines of the address bus are multiplexed with the data bus at port P0:0-7 of the microcontroller and the address latch, clocked by the signal ALE stores these address values for a machine cycle when accessing the memory. The EPROM chip is itself activated by the PSEN signal as appropriate. The

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GND

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Figure 3. A schematic diagram of the ECG simulator higher address bits are present at port P2:0-7 of the microcontroller and are used to address other devises as well as memory. Provision is made for manual and power-up resetting of the microcontroller by way of the push-button switch, SW1, resistors R1, R2 and capacitor C1. The peripheral interface adapter (PIA), IC4, allows the single 8-bit data port of the microcontroller, P0:0-7, to be expanded to three bidirectional 8-bit ports A, B, and C for the purposes of interfacing with the LCD module and the keypad. Port C is operated as two independent 4-bit ports. The input data bus of the PIA, D:0-7, is connected to the data bus, P0:0-7, of the microcontroller via the octal tri-state transceiver, IC5, so that the input port of the PIA can be isolated from the microcontroller when fetching instructions from memory. The port

selection address and the RD and WR control signals are obtained from the address latch and pins 16,17 of the microcontroller, respectively and are fed to the PIA via the tri-state bus driver, IC6, so that these lines can also be isolated when required. This driver is enabled from port P2:5,6 of the microcontroller. The keypad is a 16-button device arranged as 4 rows x 4 columns. One end of the row and column lines are connected to pull-up resistors, R3R10, so that these lines are normally high. The other ends of the row and column lines are connected to port PC:0-3 and port PB:0-3 of the PIA, respectively. The keypad is scanned by driving each row line low in turn and monitoring the status of the columns. When a button is pressed, the column line intersecting the row which is driven low will also go low, allowing the button pressed to be identified.

P3:4

P3:5

1A WR

1B

2A

2B

2G

CONTROL SIGNALS FROM

2 BIT X 4 CHANNEL DEMULTIPLEXER MONOSTABLE 1

MONOSTABLE 2 OUT

TRIG MICROCONTROLLER OUT

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TRIG

VOLTAGE

2Y0

1Y1

2Y1

1Y2

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2.5V

REFERENCE

CS D 0-7

Vref Vout

DAC1

S/H Vin

Vout

A1

INPUT DATA FROM MICROCONTROLLER

CS Vref D 0-7

Vout

DAC2

S/H Vin Vout

A2

CS Vref D 0-7

Vout

DAC3

S/H Vin

A3

Vout

FILTER

OUTPUT ECG

Fig. 4 A block diagram of the output conversion unit The LCD module is an integrated display unit having internal communication, storage and control logic. It provides two lines of 7x5 dot matrix alphanumeric characters with 40 characters per line. Port PA:0-7 of the PIA drives the data port of the LCD module D:07, while the upper bits of port PC:5-7 of the PIA are used to provide the necessary handshaking. Viewing angle and contrast of the display can be adjusted via the potentiometer, RV1. The output digital-to-analogue conversion (DAC) unit implements a multi-level conversion process centered around IC7, which contains four individual 12-bit multiplying DACs having internal data registers. A stable reference voltage of 2.5V is provided by IC11. A quad sample-and-hold amplifier chip, IC8, is used in conjunction with IC7 to provide deglitching of the output signal. Both of these ICs interface with the microcontroller via the dual 4channel demultiplexer, IC9 and the dual monostable multivibrator, IC10. The final output signal is passed through a low-pass filter comprising of op-amp, IC12, resistors R11, R12 and capacitors C4 and C5. This filter is a 2nd-order Sallen-Key filter having a cut-off frequency of 200Hz. A unity gain, inverting amplifier, in the form of op-amp, IC13 and resistors R13 and R14, is added to the output of the filter to allow a balanced differential output signal to be obtained. Both op-amps are very low noise OP37 types, which include provision for offset cancellation by means of potentiometers RV2 and RV3. A more detailed block diagram of this section of the simulator is shown in Fig.4. It can be seen that three of the DACs are essentially connected

in cascade with sample-and-hold amplifiers interposed between them. The multiplying feature of the DACs allows the reference voltage to be a variable input so that the output voltage of each is given by:

Vout = VREF .

D:0−11 4096

(8)

where D:0-11 is decimal value of the 12-bit data input. The DACs have internal data registers and the input buses of these are connected in parallel to port P1:0-7 of the microcontroller, with only the lower 8 bits of each DAC being used. A fixed reference voltage is applied to DAC1 while the digital input data are used to set the overall amplitude of the ECG signal produced. The output voltage of DAC1 is fed in as reference voltage to DAC2 via the sample-and-hold amplifier, A1, with the digital input of DAC2 being used to scale the relative amplitudes of the P and T waves at the appropriate points in the cardiac cycle. The output voltage of DAC2 is in turn fed in as reference voltage to DAC3 via the second sample-and-hold amplifier, A2. The digital input data to DAC3 consist of the sequences of individual samples of the constituent components, which assemble seamlessly together to synthesize the complete ECG signal. The output ECG signal generated by DAC3 is finally fed through the last sample-and-hold amplifier, A3, which removes large conversion glitches before the signal is applied to the output filter. The DACs and thecorresponding sample-and-hold amplifiers are selected individually by the dual 4-

channel demultiplexer, IC9. The address lines of both halves of this demultiplexer are connected in parallel to two lines, port P3:4-5 of the microcontroller, which determine the DAC and corresponding sample-and-hold amplifier selected. The two monostable multivibrators in IC10 are connected in tandem to generate a delayed pulse which is fed through one of the demultiplexers to activate the input data registers of the selected DAC by way of its CS input. The WR pulse from the microcontroller is inverted and fed through the other demultiplexer to activate the corresponding sample-and-hold amplifier after a further delay, via its S/H input.

START

initialise default paramater values update LCD display

request user editing / entry of modified parameter values

input user defined parameters update LCD display

keypad scanning subroutine

calculate cardiac cycle time and duration of QRS complex, P-wave and T-wave

subroutines for addition, subtraction, square root,

determine length of P-Q segment and S-T segment

overlap of P-wave and T-wave

YES

NO

multiplication, division, binary to BCD conversion, etc.

modify durations of normal sections of P-wave and T-wave to allow for period of overlap

generate values for period of overlap as vector sum of P-wave and T-wave during this time

5. Software algorithm A flowchart outlining the execution of the running programme is shown in Fig. 5. When the simulator is first powered up default values are initialised for the user-defined parameters of the signal. These values are then fed to the LCD followed by a message requesting the user to enter modified values as required. The keyboard is then scanned for data entered and the parameter values progressively updated as appropriate, both internally in the microcontroller and on the display. From the values of heart rate and QRS up-slope specified, the duration of the P-wave, T-wave, QRS complex and the intervals between them are calculated using equations 1-7 given previously. These results are then used to determine the inter-sample time needed to generate each of the constituent components of the signal. The precise locations of the onset and termination of each component and of the isoelectric periods in the cardiac cycle are evaluated. Stored files produced by ''idealising'' previously recorded signals were used to generate the profiles of the Pwave and T-wave. The partial merging of these waves at higher values of heart rate is taken into account and the value of the signal in this event is generated as the vector sum of the two individual waves. The ECG signal is then generated as a series of piecewise segments. Initially data are fed to DAC1 to set up the overall signal amplitude. Data sequences are then sent to DAC3 at a suitable rate to generate the individual waves and the isoelectric segments between them. Data controlling the amplitude scale factor are also updated and sent to DAC2 at the appropriate points in the cardiac cycle to vary the relative amplitude of the P and T waves as required.

subroutine for updating LCD display

determine sample times required for data sequences of all individual components of signal

output scale factor to DAC 1 to set up QRS amplitude

output scale factor to DAC 2 to set up relative P-wave amplitude

output data sequence to DAC 3 to generate normal section of P-wave

time out P-Q segment as baseline isoelectric period

update scale factor to DAC 2 to unity for QRS complex

generate QRS complex as series of linear ramp sectionsvia DAC 3 with user defined upslope time

time out Q-T segment as baseline isoelectric period

output scale factor to DAC 2 to set up relative T-wave amplitude

output data sequence to DAC 3 to generate normal section of T-wave

overlap of P-wave and T-wave

YES

output data sequence for combined P-wave and T-wave overlap period

NO time out rest of cardiac cycle as baseline isoelectric period

YES

data input NO request from keypad

Fig. 5. A flowchart of programme operation

6. Conclusion Figs. 6(a)-(c) show some examples of waveforms generated by the simulator at heart rates of 70, 140 and 190 beats/min., respectively. Changes in the timing of the constituent components can be seen to be a faithful reproduction of those observed in vivo.

In particular the partial merging of the P and Twaves at high values of heart rate has been accurately replicated. It should be pointed out that the quantization noise visible on these signals was caused by the equipment used to obtain the recordings for the purposes of illustration. The hardware for the simulator was originally developed on breadboard and subsequently a prototype was constructed on two printed circuit boards, one containing the microcontroller and digital circuitry and the other containing the analogue output conversion circuitry. Extreme care had to be exercised in constructing the analogue circuitry particularly with regard to grounding and shielding. Separate analogue and digital ground lines were used with the DACs and power lines were locally decoupled. The simulator must be fed from a fully isolated power supply and low level signals have highest purity when a battery source is used. Standard commercially available components were used to construct the prototype but the use of surface mounted components would allow the simulator to be made quite lightweight and compact making it extremely portable. It is also relatively inexpensive to produce.

(a) heart-rate at 70bpm

(b) heart-rate at 140bpm

(c) heart-rate at 190bpm

Fig. 6. Waveforms of ECG signals generated by the simulator

References: [1] W. Einthoven, The string galvanometer and the human electrocardiogram, Proceedings of the Section of Science of the Dutch Royal Society of Medicine, Vol.4, 1904, pp. 107-115. [2] A. S. Berson and H. V. Pipberger, The low frequency response of electrocardiographs: a frequent source of recording errors, American Heart Journal, Vol.71, 1966, pp. 779-789. [3] A. S. Berson and H. V. Pipberger, Electrocadiographic distortions caused by inadequate high-frequency response of directwriting electrocardiographs, American Heart Journal, Vol.74, 1967, pp.208-218. [4] D. Tayler and R. Vincent, Signal distortion in the electrocardiogram due to inadequate phase response, IEEE Transactions on Biomedical Engineering, Vol.30, 1983, pp.352-356. [5] M. De Sa, An ECG waveform generator, World Medical Electronics and Instrumentation, Vol.2, 1964, pp. 174-175. [6] C. J. Marevel and D. J. Kirk, Use of microprocessor to simulate electrocardiogram, Journal of Biomedical Engineering, Vol.2, 1980, pp. 217-220. [7] A. L. Evan, Microprocessor controlled signal generator for functional testing of electrocardiographs, Medical and Biological Engineering and Computing, Vol.22, 1984, pp. 468-470. [8] H. C. Bazett, An analysis of the time relations of the electrocardiogram, Heart, Vol.7, 1920, pp. 353-370. [9] W. Adams, Normal duration of the electrocardiographic ventricular complex, Journal of Clinical Investigation, Vol.15, 1936, pp. 335. [10] R. Ashman and E. Hull, Essentials of Electrocardiography for the Student and Practitioner of Medicine, Macmillan, 1945. [11] E. Simonson and J. Ld, The normal Q-T interval, American Heart Journal, Vol.63, 1962, pp. 747. [12] F. Akhras, and A. Rickard, The relationship between the QT interval and the heart rate during physiological exercise and pacing, Japanese Heart Journal, Vol.22, 1981, pp. 345. [13] J. Sandor and S. Louis, The duration of the QT interval as a function of heart rate, American Heart Journal, Vol.110, 1985, pp. 872-876. [14] M. Nasor, Wavelet analysis and microcontroller-based synthesis of the human electrocardiogram, PhD. Thesis, Trinity College Dublin, 1998.