Issues in Assembly Process of Next-Generation Fine-Pitch Chip-On ...

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IEEE TRANSACTIONS ON ADVANCED PACKAGING, VOL. 30, NO. 1, FEBRUARY 2007

Issues in Assembly Process of NextGeneration Fine-Pitch Chip-On-Flex Packages for LCD Applications Changsoo Jang, Seongyoung Han, Jaychul Ryu, Seungmin Cho, and Hangyu Kim

Abstract—Some of the current assembly issues of fine-pitch chip-on-flex (COF) packages for LCD applications are reviewed. Traditional underfill material, anisotropic conductive adhesive (ACA), and nonconductive adhesive (NCA) are considered in conjunction with two applicable bonding methods including thermal and laser bonding. Advantages and disadvantages of each material/process combination are identified. Their applicability is further investigated to identify a process most suitable to the next-generation fine-pitch packages (less than 35 m). Numerical results and subsequent testing results indicate that the NCA/laser bonding process is advantageous for preventing both lead crack and excessive misalignment compared to the conventional bonding process. Index Terms—Assembly, bump joint, fine-pitch chip-on-flex package, nonflow underfill.

I. INTRODUCTION

F

ACING THE demand of shrinkage in display footprint and increase in pixel count, the lead pitch of electronic packages for LCD applications is getting finer, and at the same time, the pin count of a single chip is increasing. LCD manufacturers are trying hard to develop low-cost packaging processes that satisfy both requirements. Some of them have their own methodologies or processes [1]. In general, there are three package types used in current products: tape carrier package (TCP), chip-on-glass (COG), and chip-on-flex (COF). The TCP was introduced in the late 1980s for low-cost mass production of high-resolution displays. It has served as a major packaging method in the LCD industry because it satisfies low-cost and fine pitch down to 40 m for conventional LCD packaging [2]. However, it has limitations when it comes to the products with lead pitch finer than 40 m. The “floating” leads for the gang lead bonding may cause problems including misalignments and tilted leads. Moreover, excessive stresses by lead deformation during the bonding process can result in lead breakage, combined with thermal stresses by coefficient of thermal expansion (CTE) mismatch between a silicon chip and a film at high bonding temperature [3]. The COG has a great potential in low-cost fine-pitch LCD packaging. Currently, it is being applied to hand-held and

Manuscript received November 22, 2004; revised November 23, 2005 and July 4, 2006. The authors are with the Semiconductor Materials R&D Center, Samsung Techwin Corporation, Ltd., Gyunggi-Do 449-712, Korea (e-mail: [email protected]). Digital Object Identifier 10.1109/TADVP.2006.890202

(a)

(b)

Fig. 1. Photograph of (a) typical COF package and (b) its cross section.

small-area displays. Its inherent problems such as stringent bump coplanarity requirement, difficult cumulative tolerance control, and poor repairability have hindered its application to larger-area LCD products. Out of the three package types described above, the main focus of this paper lies on the COF. It was developed in the late 1990s to overcome the limitations of the TCP. Since then, the market proportion of the COF has increased, substituting the position of the TCP due to its low-cost and high-yield capability in fine-pitch products. Fig. 1 shows an example of the COF package. Though the basic concepts of both packages are identical, several differences exist in the film structure and bonding method. The TCP film has a device cavity in the center for the gang lead bonding. In order to make this structure, it requires four layers: polyimide (PI) tape, epoxy resin, copper film, and solder resist. On the other hand, since the COF does not have the cavity, it does not need the epoxy resin layer between the copper and PI tape. Instead of the gang bonding, a flip-chip bonding method is used for the COF packaging, which mitigates the stress on copper lead. Because the whole film is fixed in the flip-chip bonder stage, there is no floating part, and as a consequence, better alignment stability can be obtained compared with the TCP. In this paper, various types of the COF assembly process were reviewed to identify the most suitable combination for finer pitch products. Since real tests with the “ultrafine” pitch COF (under 30 m) are difficult, both computational and experimental approaches were utilized. II. REVIEW OF CHIP-ON-FLEX JOINT METHODS There are various ways to package an IC chip without solder [4]. Among the nonpressure bonding methods introduced in the reference, the SnAu bonding is currently being applied to the

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JANG et al.: ISSUES IN ASSEMBLY PROCESS OF NEXT-GENERATION FINE-PITCH COF PACKAGES

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TABLE I AVAILABILITY OF COMBINATIONS

COF. This interconnection has been very successful for lead pitch wider than 35 m, the current pitch product. The SnAu bonding has a temperature requirement that a bonding temperature must exceed the eutectic temperature, around 280 C. This may be a very critical issue in finer pitch packaging due to thermally induced stresses, which will be discussed in the next section. In order to mitigate these stresses, low-temperature bonding processes are emerging as alternatives. It utilizes an anisotropic conductive adhesive (ACA) or a nonconductive adhesive (NCA) along with mechanical contacts of bump/lead joints. As for the ACA, it has been used in connecting a flexible film to an ITO glass or a printed circuit board, whose lead pitch is wide. Trials to apply the ACA on bump-lead connections were started in recent years for the COG and direct chip attaching (DCA) on a small footprint board [5]. An isotropic conductive adhesive can be another alternative. However, it is not included in the scope of this study because of its limited applications. Meanwhile, changing the flip-chip bonding method can improve the packaging process to reduce thermal stresses during the manufacturing processes. Instead of a conventional thermode ceramic tool, a laser can be used as an energy source of eutectic joint formation and underfill curing [6]. It can transmit the minimum required energy to eutectic joint area or adhesive resin so that redundant temperature rise can be prevented. Since chip heating follows the alignment between chip and substrate, the laser bonding can accommodate more precise assembly process, which is verified in the next section. Another alternative may be an ultrasonic (also known as thermosonic) bonding [7]. However, its inherent horizontal vibration would cause serious misalignment and coplanarity problems in fine-pitch COF packaging. Another obstacle is an ultrasonic energy requirement to handle long LCD driver chips, which are usually greater than 1 mm. Considering these points, the ultrasonic bonding method is not included in the scope of this study. In the COF packaging process, the combination of various heat sources and joint resin materials may or may not be possible. For example, the conventional underfill process is available only for the eutectic joint, while the eutectic joint can be combined with both conventional and nonflow underfill processes. Available combinations of resin materials, heat sources, and joints are summarized in Table I. Corresponding assembly processes are shown in Fig. 2. III. INVESTIGATIONS ON ASSEMBLY ISSUES There are two main issues in fine-pitch COF packaging incorporated with the current bonding process: lead breakage and

Fig. 2. Simplified process list with various underfill resins and heat sources.

Fig. 3. Delamination and breakage of corner leads after tool compression and eutectic formation.

misalignment. As enormous COF products in sale prove, either of them has not been any obstacle for conventional pitch products (wider than 35 m). In this section, failure mechanisms are identified on issues, and the potential of alternative methods is evaluated. A. Lead Breakage in Conventional AuSn Eutectic Bonding With Underfill Process In this process, the bump-lead eutectic (AuSn) bonding precedes the underfill process. Therefore, thermally induced stresses are imposed directly on eutectic joints. These stresses come from CTE mismatch between a silicon chip and PI-based COF film. Fig. 3 shows an example of the lead breakage and the delamination of the broken lead from the base film after assembly of a 30- m-pitch film/chip set. It should be noted that all lead widths were designed to be a half of corresponding lead pitches in this study. Since lead breakage during the assembly process is an instantaneous phenomenon in a miscellaneous area, a visual inspection or similar approach is almost impossible. Therefore, a finite-element analysis was used to investigate the failure mechanism. Material properties were characterized, and the model was verified experimentally prior to the main analysis [3]. A contact element was employed between bumps and leads for evaluation of peel stress. Typical mesh setup is illustrated in Fig. 4. Fig. 5 shows typical strain and peel stress distributions along copper leads around a chip corner. It should be noted that

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IEEE TRANSACTIONS ON ADVANCED PACKAGING, VOL. 30, NO. 1, FEBRUARY 2007

Fig. 4. Mesh setup for COF assembly process simulation.

Fig. 6. (a) Lead strain and (b) peel stress (right) distributions along ten corner leads.

Fig. 7. Mesh setup of single bump-lead joint. Fig. 5. (a) Lead strain and (b) peel stress distributions along leads around chip corner.

the negative contact pressure indicates a tensile peel stress. Both the maximum strain and stress were observed in the outer edge of the corner bump-lead joint area, which coincided with the real delamination/breakage site (Fig. 6). A single bump-lead joint with lead pitch of 30 m was investigated to get a more detailed evaluation of the lead strain during the chip compression process as shown in Figs. 7 and 8. Results revealed that the maximum first principal strain did

not exceed 20%, which is lower than the conventional elongation (30%–35%) of the copper film. This indicates that the lead breakage was caused not simply by excessive local stress concentration but by impact-like excessive tension after lead delamination. Fig. 9 shows the effect of the lead pitch on the peel stress and lead strain. The detailed explanations on obtaining this result can be found in [3]. It indicates that, as the lead pitch decreased from 50 to 25 m, the peel stress and lead strain increase up to 40%–50%. Such an increase caused the lead breakage that

JANG et al.: ISSUES IN ASSEMBLY PROCESS OF NEXT-GENERATION FINE-PITCH COF PACKAGES

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(a)

(b)

Fig. 10. Microscopic image of lead/bump joints using (a) ACA and (b) NCA.

Fig. 8. First principal lead strain with respect to lead deformation during assembly.

Fig. 9. Lead strain and peel stress trend at corner lead with respect to lead pitch.

has not yet occurred at conventional pitch products. From this finding, a design solution could be derived [8]. Simply assigning a coarse pitch lead at the corner position can prevent the initiation of lead delamination/breakage. Although it is very simple and effective, it may not be applicable to the chip that does not have enough lead space at the corner. Therefore, a more fundamental remedy is required from the viewpoint of the assembly process. B. Nonflow Underfills as Alternative The thermally induced stresses on bump/lead joints can be almost removed by using a nonflow underfill process. The nonflow underfill is dispensed on a film before chip/film assembly. It is completely cured during heated compressive bonding period. The stresses are distributed all around the underfill in the case of the nonflow underfill process, while they are imposed directly on bump/lead joints in the case of the conventional (post) underfill process. This predispensing process has an additional advantage of low cost capability. It can be conducted using a

flip-chip bonding machine, clearing the space of a separate underfill machine. Fig. 10 shows the typical images of bump/lead joints using two popular nonflow underfills: ACA and NCA. The ACA contains microscopic conductive balls within resin matrix. Conductive balls are made of elastic polymers usually coated by gold and/or tin. A few to tens of balls are trapped and deformed between a bump and a lead during the assembly process so that an electric path can be formed. In the case of the NCA, the bump directly contacts the lead. The chemically contracted NCA keeps them in contact [9]. In a sense, the NCA may be called simply as the “preunderfill.” Two main issues in application of ACA on the fine-pitch COF assembly are coplanarity control and electrical connection for bump/lead joints. The coplanarity issue is related with the accuracy of a bonding machine. In this section, the electrical connection issue will be discussed. Dudek et al. [10] suggested a simple evaluation method for trapped ball number between a single bump/lead joint. In this method, variables included a short-edge length in a bump/lead contact area, an ACA film thickness, a conductive ball density balls mm and a conductive ball diameter. The final equation for trapped ball prediction was represented as

(1) is the in-plane position of a ball from the center of where bump/lead contact area at time , the initial in-plane position, the vertical position of a ball from the top of the lead, the bump/lead gap initial gap between the bump and lead, and at time . The total volume of balls within unit resin volume was assumed to be constant. It implies that particle density will be proportional to third power of the ball diameter. The volume portion of the balls cannot be increased over a certain value owing to the risk of a shortage problem. All other variables were set the same as those in [10] except the bump/lead configuration. In the final state, the balls were assumed to be deformed by 60% of their diameter. Fig. 11 shows the computed maximum to minimum range of trapped ball count in a single bump/lead joint versus the ball diameter and lead top width, respectively. The trapped ball count less than one means the high probability of an open failure. In order to avoid it the ball density

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IEEE TRANSACTIONS ON ADVANCED PACKAGING, VOL. 30, NO. 1, FEBRUARY 2007

Fig. 12. Probability plot of open failure due to no ball trap.

Fig. 11. Trapped ball counts range variations with respect to (a) conductive ball diameter and (b) lead width.

happen even to normal joints with trapped balls. In a summary, the application of the ACA to fine-pitch COF interconnection requires reduced ball size and more accurate control of bump/lead height and chip/film coplanarity. The NCA does not have the conductive ball. The interconnection is achieved by direct contact between bump/lead surfaces. This can actually remove the risk of the open failure, if alignment and coplanarity (less strict than the ACA) conditions meet. On the other hand, the NCA may be disadvantageous in reliability. It does not offer an elastic “cushion” between the bump and lead, which is provided by the conductive balls in the ACA. Such a cushion effect may mitigate the stress at the joint. Fortunately, the COF is highly reliable to the thermally induced stress due to its inherent flexibility. No failure in the temperature cycle test has been reported for the COF. It indicates that the NCA is safe and satisfactory at least with the fine-pitch COF packaging. C. Misalignment in Thermal Flip-Chip Bonding Process

must be increased by reducing the ball diameter. If we assume the trapped ball count follows a random nature, its probability density function can be represented by the Poisson distribution as (2). The probability of open failure is evaluated with respect to the ball diameter and lead width (usually a half of the lead pitch) as shown in Fig. 12 (2) where is the probability, the mean value of trapped ball count, and the trapped ball count. If the lead pitch of the COF is 40 m, the ACA with a ball diameter less than 3 m should be employed to achieve the 99.95% confidence level of good electrical connection (at least one trapped ball). Still, when it comes to the packages with large number of bumps, the error cannot be neglected. For packages with 400 bumps, one out of five chips may have an opened bump/lead joint. Besides, if the magnitude of gap variation between bumps and leads exceeds 3 m, the open failure can

As the lead pitch gets finer, the more accurate control of alignment between a chip and a film is demanded. The existing tolerance requirement is eventually to be replaced with a new standard for satisfactory yields. The causes of the misalignment in COF assembly process are various in the film, chip, bonding equipment, and so on. The bonding tolerance belongs to the nature of variation. Numerous data are required for a statistical analysis. Finite-element modeling may be a very ineffective tool in this case since the real COF film structure is complex to model as shown in Fig. 13. To be more effective, the film elongation was evaluated using a simple rule-of-mixture equation as represented here, where

(3)

where is the coefficient of thermal expansion, modulus, and the volume.

the Young’s

JANG et al.: ISSUES IN ASSEMBLY PROCESS OF NEXT-GENERATION FINE-PITCH COF PACKAGES

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Fig. 15. Main effect plot of COF film parameters through two-level factorial analysis.

Fig. 13. (a) Simplified cross-sectional schematic of COF film and (b) example of its finite-element model (right).

Fig. 16. CTE measurement data of two PI tape with respect to temperature.

Fig. 14. Typical result of Monte Carlo analysis for variation of film elongation.

This equation is applicable to isotropic composite materials. The COF film is not isotropic but transversely isotropic due to the direction of lead circuit patterns. In order to take it into account, the film was divided into two regions: copper lead and space. Effective CTEs and elongations were evaluated for both regions and then summed for total elongation. This simple method was proved effective and accurate. The discrepancy between its results and finite-element calculations or measurements was less than 10% [11]. Parameters causing the variation of elongation of the COF film included the fluctuation of material properties of the PI tape and solder resist, the thickness of each layer, and the etched shape of the copper lead. Using a random data generation tool, a Monte Carlo analysis of film elongation variation was conducted. Fig. 14 shows an example of the result with 1000 data points. Through a two-level factorial analysis for all parameters,

the most significant parameter was found to be the CTE of the PI tape as illustrated in Fig. 15. The CTE measurement of the PI tape was performed. Fig. 16 shows the result of two PI tape samples of an identical model. The window in the figure shows the temperature range during the alignment process. At the temperature range, the CTE difference between the two varied from 20% to more than 100%. Such fluctuation of the CTE can cause the variation of film elongation as discussed earlier. For example, a reduced CTE by 50% can lead to a reduced COF film elongation by 30%. This effect of CTE variation can be magnified by increasing the bonding temperature and chip length. From the silicon chip point of view, the main factor influencing the assembly tolerance is the chip temperature although the CTE of the silicon is very small (2.6 ppm C). In the AuSn eutectic bonding, the bump/lead joint temperature is raised up to no lower than the eutectic temperature around 280 C. In the conventional thermal flip-chip bonding process, the chip is preheated to a higher temperature than the eutectic temperature. The energy is transferred from a high-temperature thermode tool of a bonder head to the chip. For quick and stable eutectic formation, the temperature of the thermode tool is usually set around 500 C. The possibility of temperature fluctuation during assembly process was evaluated using a 2-D finite-element model including a bonding tool and a chip. The results are shown in

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IEEE TRANSACTIONS ON ADVANCED PACKAGING, VOL. 30, NO. 1, FEBRUARY 2007

Fig. 19. Difference between finite-element analysis result and its linear regression result.

value of misalignment in each parameter variation is all zero, that is, perfect alignment Fig. 17. Typical temperature distribution around silicon chip and bonder tool.

(5) where is the standard deviation. Only the major sources of the misalignment have been reviewed due to the complicated nature of the assembly processes. One of the minor misalignment sources is a nonlinear elongation behavior of the COF film by nonuniform distribution of the copper lead pattern. An example is illustrated in Fig. 19. The difference in longitudinal displacement between the finite-element analysis and its linear regression reached up to 0.1 m. This discrepancy cannot be compensated with the current design style. This type of misalignment is not in the nature of variation. Therefore, it has to be added to total misalignment in (5) as follows:

(6) Fig. 18. Temperature trend after chip exposure to ambient air.

is the total variation of misalignment and where nonfluctuated/noncompensable misalignment. Figs. 17 and 18. The ambient temperature was set 60 C and convective heat transfer coefficient of 10 was used. Even though all geometric and analysis parameters were intentionally set conservative, the result demonstrated that the temperature was decreased by 10 C–50 C in only 0.01 s. Such a quick temperature change cannot be caught by a conventional temperature controller. This phenomenon causes the fluctuation of the chip temperature at the moment of the chip/film assembly. For example, the elongation of a chip with a length of 14 mm is varied by 1 m with the temperature change of 27 C, as calculated as follows: (4) where is the CTE, the length, and the temperature. The total variation of alignment accuracy is calculated by summing all effects of variation sources as below since the mean

the

D. Laser Bonding Process The thermode tool in thermal bonding can be replaced with the laser. In the laser bonding method, the energy is supplied after chip/film alignment and compression. Therefore, the chip temperature can be maintained constant during the entire period of the alignment process. This can reduce or almost remove the fluctuation of chip elongation. The bonding accuracy enhancement in the laser bonding can be calculated using (5). The result in Fig. 20 shows that the effect of the laser bonding is magnified as the total misalignment gets lower (that is, in finer pitch assembly). If we assume the standard deviation of temperature fluctuation to be 50 C in the thermal bonding and the tolerance requirement to be 5 m, the tolerance improvement is about 0.4 m. In 3- level, the improvement would be 1.2 m. It can offer a great tolerance buffer for other

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pilot products with lead pitch of 25–30 m. The COF films have been assembled with the corresponding LCD driver chips successfully. Fig. 21 shows the images of interconnections in a 25- m-pitch COF package. Those packages have passed 1000 thermal cycles (TC; 55 C–125 C), 168 h of pressure cooker test (PCT; 121 C 95 RH atm) and 500 h of high-temperature storage test (HSTS; 150 C) without any electrical failure. This indicates that the proposed process has good performance for the reliability as well as the assembly. IV. CONCLUSION

Fig. 20. Alignment enhancement in laser bonding with respect to temperature fluctuation in thermal bonding.

TABLE II LIST OF POSSIBLE FAILURE MECHANISMS

As the LCD industry develops and expands, the current-pitch COF products (40–50 m) are being replaced with finer pitch products (less than 40 m) to meet cost and size requirements. Based on this premise, the two main issues, lead breakage and misalignment, in the conventional COF assembly process were reviewed, and the solutions for two issues were suggested. It was found that the nonflow underfill and the laser bonding method could reduce the potential of the lead breakage and the excessive misalignment, respectively. Between two nonflow underfill candidates, the NCA was found to provide better electrical connection for fine-pitch bump/lead joints. Applying the optimum combination (NCA/laser bonding) fine-pitch COF products with lead pitch of 25–30 m were successfully manufactured. No failure has occurred during various accelerated environmental tests. It indicates the NCA/laser bonding method also has good reliability performance. REFERENCES

Fig. 21. 25-m-pitch COF package assembly using NCA/laser bonding process.

parameters and expand applicability of the current process to further finer pitch products. E. Combination of NCA and Laser Bonding Investigation of assembly processes in this study are summarized in Table II. The most feasible process for fine-pitch COF assembly was found to be the laser bonding method combined with the NCA. The effectiveness of the NCA/laser bonding method was verified through the assembly test of

[1] J. C. Hwang, “Advanced low-cost bare-die packaging technology for liquid crystal displays,” IEEE Trans. Compon., Packag. Manuf. Technol. A, vol. 18, no. 3, pp. 458–461, Sep. 1995. [2] J. R. Morris, “Interconnection and assembly of LCDs,” in Proc. AMLCDs, 1995, pp. 66–71. [3] C. Jang, S. Hang, H. Kim, and S. Kang, “A numerical failure analysis on lead breakage issues of ultra fine pitch flip chip-on-flex and tape carrier packages during chip/film assembly process,” Microelectron. Rel., vol. 46, no. 2–4, pp. 487–495, 2006. [4] M. Takeichi and M. Nagashima, “Trend of solder-less joint in flip chip bonding,” in IEEE Conf. Polymers Adhesives Microelectron. Photon., Oct. 2001, pp. 168–172. [5] M. J. Yim, K. W. Paik, Y. K. Kim, and H. N. Hwang, “A study on the electrical conduction mechanism of anisotropically conductive film (ACF) for LCD packaging applications,” in Proc. InterPACK’97, Jun. 1997, pp. 65–72. [6] P. J. Spletter and R. T. Crowley, “A laser based system for tape automated bonding to integrated circuits,” in Proc. ECTC, May 1990, pp. 20–23. [7] S. Kang, P. M. Williams, and Y. Lee, “Modeling and experimental studies on thermosonic flip-chip bonding,” IEEE Trans. Compon. Packag. Manuf. Technol. B: Adv. Packag., vol. 18, no. 4, pp. 728–733, Nov. 1995. [8] C. Jang, J. Ryu, and S. Han, “Printed wiring board to mitigate stress concentration and semiconductor package that adopt this board,” Korea Patent Applicat. No. 2004-057141, 2004. [9] C. Hatano, H. Takahashi, and T. Ichida, “Modified flip-chip attach process using high performance non-flow underfill paste,” in Proc. ECTC, 2002, pp. 398–403. [10] R. Dudek, S. Meinel, A. Schubert, B. Michel, L. Dorfmuller, P. M. Knoll, and J. Baumbach, “Flow characterization and thermo-mechanical response of anisotropic conductive films,” IEEE Trans. Compon. Packag. Technol., vol. 22, no. 2, pp. 177–185, Jun. 1999. [11] C. Jang, “Design guideline from the viewpoint of assembly tolerance of COF packaging,” Samsung Internal Rep., 2004.

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Changsoo Jang was born in, Mokpo, Korea. He received the Ph.D degree in mechanical engineering from the Korea Advanced Institute of Science and Technology, Daejeon, Korea, in 2000. He joined the Samsung Techwin Company, Ltd., as a Senior Researcher in 2000. He is engaged in computer-aided engineering and reliability assessment for electronic packages and semiconductor equipment.

Seungmin Cho was born in Taegu, Korea. He received the Ph.D. degree in mechanical engineering from University of Maryland, College Park. After he received the Ph.D. degree, he joined the Samsung Techwin Company, Ltd., and is currently working on manufacturing substrate for IC packages. His area of interest is characterization and reliability of electronic packages under thermomechanical loadings.

Seongyoung Han was born in. Seoul, Korea. He received the B.S. degree in mechanical engineering from Hanyang University, Seoul, Korea, in 1990. Currently, he is a Project Manager for robust design and virtual qualification of semiconductor packages.

Hangyu Kim was born in, Cheolwon, Korea. He received the B.S. degree in electrical engineering from Kyungpook National University, Daegu, Korea, in 1982. Currently, he is a Vice President and the Group Leader of the Semiconductor Materials R&D Center, Samsung Techwin Company, Ltd.

Jaychul Ryu was born in, Seoul, Korea. He received the M.S. degree in chemical engineering from Dongguk University, Seoul, Korea, in 1992. Since 1992, he has been a Senior Researcher in the Semiconductor Materials R&D Center, Samsung Techwin Company, Ltd. He is a Project Manager for development of reel-to-reel manufacturing process for electronic package and flat panel display applications.

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